selected publications
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academic article
- A 0.18-mu m CMOS analog min-sum iterative decoder for a (32,8) low-density parity-check (LDPC) code. IEEE Journal of Solid-State Circuits. 41:2531-2540. 2006
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conference paper
- A high-speed analog min-sum iterative decoder. 2005 IEEE International Symposium on Information Theory. 1768-1772. 2005