selected publications
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academic article
- A 1 GS/s, 31 MHz BW, 76.3 dB dynamic range, 34 mW CT - ADC with 1.5 cycle quantizer delay and improved STF. Analog Integrated Circuits and Signal Processing. 78:275-286. 2014
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conference paper
- An On-chip Ramp Generator for Single-Slope Look Ahead Ramp (SSLAR) ADC. 2009 IEEE 52nd International Midwest Symposium on Circuits and Systems. 373-376. 2009